Maxim-integrated 73S12xxF Manual do Utilizador

Simplifying System IntegrationTM Using Synchronous Smart Cards with the 73S12xxF December 18, 2008 Rev. 1.0

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 10 Rev. 1.0 3 Using Synchronous Smart Cards with the 73S12xxF The smart card block wi

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 11 3.2.1 2-Wire Card Operation 3.2.1.1 ATR Retrieval The description of t

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 12 Rev. 1.0 Figure 13: Start Bit Zoom Figure 14: Stop Bit Zoom The last byte of th

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 13 Figure 15: Start Bit and WAITTO When reading the ATR response, setting

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 14 Rev. 1.0 3.2.2 3-Wire Card Operation 3.2.2.1 ATR Retrieval The ATR retrieval for

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 15 Figure 18: WAITTO Interrupt Timing on the Command Byte Figure 19: Zoo

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 16 Rev. 1.0 3.2.2.3 Reading Data from the Card Reading data from a 3-wire card is a b

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 17 Figure 22: I2C Transaction End with Stop Bit When reading data from th

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 18 Rev. 1.0 Figure 23: I2C Data Read The read operations can read continuous consecu

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 19 4 Related Documentation The following 73S12xxF documents are available

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 2 Rev. 1.0 © 2008 Teridian Semiconductor Cor

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 20 Rev. 1.0 Appendix A The following figures show the flowcharts for each type of sync

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 21 A.1 2-Wire Card Activation and ATR Retrieval

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 22 Rev. 1.0

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 23 WAITTO bit set?Last byte of ATR received?CWait for smart card InterruptR

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 24 Rev. 1.0 A.2 2-Wire Send Command to Sync Card with Start and Stop Bits

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 25 Figure 26: 2-Wire Send Command Flowchart

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 26 Rev. 1.0 A.3 2-Wire Read Data from Sync Card Figure 27: 2-Wire Read Data Flowcha

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 27 A.4 3-Wire Send Command to Sync Card with Start and Stop Bits

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 28 Rev. 1.0 Figure 28: 3-Wire Send Command Flowchart

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 29 A.5 3-Wire Read Data from Sync Card Figure 29: 3-Wire Read Data Flow

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 3 Table of Contents 1 Introduction ...

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 30 Rev. 1.0 A.6 Activate 12C Type of Smart Card

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 31 ENDATurn on VCC and configure VCC stability checking for READY START or

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 32 Rev. 1.0 A.7 Perform Page Write to 12C Mode Sync Card

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 33 CLK is left running so ACK can fininsh and I/O should be set high to pre

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 34 Rev. 1.0 A.8 Read Data from 12C Type Sync Card

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 35 CLK is left running so ACK can fininsh and I/O should be set high to pre

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 36 Rev. 1.0 Write 9 to RLENSet receive and I2C mode, set TX/RXB and SYCKSTbits in STX

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 37 Figure 32: I2C Read Data Flowchart

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 38 Rev. 1.0 Revision History Revision Date Description 1.0 12/18/2008 First publicat

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 4 Rev. 1.0 Figures Figure 1: ATR Sequence ...

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 5 1 Introduction This document describes how to use synchronous smart card

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 6 Rev. 1.0 2 Synchronous Smart Card Basics Most smart cards are the asynchronous type

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 7 2.1.2 Command and Response Processing After the ATR response has been pr

Using Synchronous Smart Cards with the 73S12xxF UG_12xxF_018 8 Rev. 1.0 2.2.2 Command and Response Processing 3-wire cards do not use start and st

UG_12xxF_018 Using Synchronous Smart Cards with the 73S12xxF Rev. 1.0 9 I/OCLKA160R/WACKA15D0A14D1A13D2. . .. . . Figure 8: Device Address 2.3.1