Maxim-integrated DS33Z41 Manual do Utilizador Página 103

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DS33Z41 Quad IMUX Ethernet Mapper
103 of 167
Register Name:
LI.RPCB0
Register Description:
Receive Packet Count Byte 0 Register
Register Address:
108h
Bit # 7 6 5 4 3 2 1 0
Name RPC7
RPC6 RPC5 RPC4 RPC3 RPC2 RPC1 RPC0
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: Receive Packet Count (RPC7 to RPC0). Eight bits of a 24-bit value. Register description below.
Register Name:
LI.RPCB1
Register Description:
Receive Packet Count Byte 1 Register
Register Address:
109h
Bit # 7 6 5 4 3 2 1 0
Name RPC15
RPC14 RPC13 RPC12 RPC11 RPC10 RPC09 RPC08
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: Receive Packet Count (RPC15 to RPC8). Eight bits of a 24-bit value. Register description below.
Register Name:
LI.RPCB2
Register Description:
Receive Packet Count Byte 2 Register
Register Address:
10Ah
Bit # 7 6 5 4 3 2 1 0
Name RPC23
RPC22 RPC21 RPC20 RPC19 RPC18 RPC17 RPC16
Default 0 0 0 0 0 0 0 0
Bits 7 to 0: Receive Packet Count (RPC23 to RPC16). These 24 bits indicate the number of packets stored in
the receive FIFO without an abort indication. Note: Packets discarded due to system loopback or an overflow
condition are included in this count. This register is valid when clear channel is enabled.
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