
78Q8430 Software Driver Development Guidelines UG_8430_004
STEP 2: Write address and mask byte [1] through byte [4] to the CAM.
For each byte, write the CAM rule indicated by
Table 4 based on the filter number and byte number
as follows:
Reg. Field Value to write
byte [1]: byte [2]: byte [3]: byte [4]: CAR ADDR
0x64+N 0x60+N 0x4C+N 0x48+N
Data Match Value of MAC address byte [1] … byte [4]
Data Mask Value of mask byte [1] . . . byte [4]
Previous Hit Match Value of the CAM rule used by the previous byte
1
RMR
Previous Hit Mask 0x7F
Byte Offset Retain default: 0x00
Interrupt Retain default: 0
Control Logic Action Retain default: NOP
2
RCR
Match Control Retain default: MD
1
For example, the Previous Hit fields for filter #1 would be 0x7D, 0x65, 0x61 and 0x4D, for byte [1]
through byte [4] respectively.
2
EXCEPTION: multicast filter #3, byte [4] should have the Action field set to TAX.
STEP 3: Write address and mask byte [5] to the CAM.
Write CAM rule 0x3C+N as follows:
Reg. Field Value to write
CAR ADDR 0x3C+N
Data Match Value of MAC address byte [5]
Data Mask Value of mask byte [5]
Previous Hit Match Set to the CAM rule that was used for byte [4] (0x48+N).
RMR
Previous Hit Mask 0x7F
Byte Offset Retain default: 0x00
Interrupt Retain default: 0
Control Logic Action Set to TAX
1
RCR
Match Control Retain default: MD
1
EXCEPTION: multicast filter #3, byte [5] should have the Action field set to SETBC.
STEP 4: Enable the filter.
Enable the multicast address filter N by modifying the CAM rule for byte [0]:
• Set the CAR ADDR field to 0x7C+N.
• Set the RMR Previous Hit Mask field to 0x7F.
This step must be done last to prevent an incoming frame from matching a partial set of filter rules.
All the rules for a filter must be in place before the first rule, and therefore the filter itself, is enabled.
A multicast address filter can be simply activated and deactivated by toggling the value of the RMR
Previous Hit Mask field for the byte [0] CAM rule between 0x7F and 0x00 respectively. Multicast filter #0
should not be deactivated in this way.
It is important to deactivate the filter in STEP 1 (by setting the Previous Hit Mask field to 0x00) so
that no frames are filtered using a partial filter setting before all relevant rules are written. STEP 4
reactivates the filter once the new settings are in place.
20 Rev. 1.0
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