Maxim-integrated MAXQ Family Users Guide: MAXQ2010 Supplement Manual do Utilizador descarregar pdf (Página 101)

MAXQ Family User’s Guide:

MAXQ2010 Supplement

20-9

20.8 LCD Frame Frequency

The LCD controller clock frequency (f

LCD

) can be sourced from either the 32kHz clock or the high-frequency clock

divided by 128 as specified by the LCCS bit. If stop mode is entered and the 32kHz clock is being used, LCD display

operation continues (if DPE = 1, OPM = 1, and SMO = 1). If stop mode is entered and the high-frequency clock divided

by 128 is being used, the LCD controller is suspended automatically until stop mode is exited and the high-frequency

clock completes its warmup period.

The bits FRM[3:0] control the generation of the LCD frame frequency from the selected LCD clock source (32kHz or

HFClk/128). The selected frame frequency (f

FRAME

) is defined as follows:

For 1/3 duty: f

FRAME

= f

LCD

/((FRM[3:0]) + 1) x 96)

For static, 1/2 and 1/4 duty: f

FRAME

= f

LCD

/((FRM[3:0]) + 1) x 64)

For best LCD drive performance, the frame frequency should typically be between 30Hz and 128Hz. Table 20-2 shows

example frequencies that can be generated from typical clock frequencies.

Figure 20-3. LCD Internal and External Display Contrast Adjustment

Table 20-2. Approximate LCD Frame Frequencies (Hz)

STATIC DISPLAY

LCD2

ADJ

LCD

LCD1

ADJ

DGND

LRIG = 1

STATIC DISPLAY

LCD2

ADJ

LCD

LCD1

ADJ

DGND

LRIG = 0

EXT

FRM[3:0]

LCD

= 32,768Hz/2 f

LCD

= 19,531Hz (10MHz/512)

1, 1/2, 1/4 1/3 1, 1/2, 1/4 1/3

0 256 171 305 204

1 128 85 153 102

2 85 57 102 68

3 64 43 76 51

4 51 34 61 41

5 43 29 51 34

6 37 25 44 29

7 32 22 38 26

1 2 ... 96 97 98 99 100 101 102 103 104 105 106 ... 146 147

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