Maxim-integrated MAX31782 Manual do Utilizador

AVAILABLEFunctional DiagramsPin Configurations appear at end of data sheet.Functional Diagrams continued at end of data sheet.UCSP is a trademark of M

Maxim Integrated 2-6MAX31782 User’s GuideRevision 0; 8/112.4.1 Program Memory AccessThe instructions that the MAX31782 is executing reside in wha

Maxim Integrated 11-6MAX31782 User’s GuideRevision 0; 8/1111.3 GPIO Port 6 Register DescriptionsPort 6 provides seven GPIO pins that are multiple

Maxim Integrated 11-7MAX31782 User’s GuideRevision 0; 8/1111.3.3 GPIO Input Register for Port 6 (PI6)PI6 is an 8-bit register that contains th

Maxim Integrated 11-8MAX31782 User’s GuideRevision 0; 8/1111.4 GPIO Code Example//setpin6.4asahighoutputPD6|=0x10; //setdirectionPD6

Maxim Integrated 12-1MAX31782 User’s GuideRevision 0; 8/11SECTION 12: TIMER B MODULE12.1 Detailed Description. . . . . . . . . . . . . . . . . .

Maxim Integrated 12-2MAX31782 User’s GuideRevision 0; 8/11SECTION 12: TIMER B MODULEThe MAX31782 provides one Timer B module that can be configure

Maxim Integrated 12-3MAX31782 User’s GuideRevision 0; 8/1112.1.1 Auto-Reload ModeThe 16-bit auto-reload mode of Timer B is established by cleari

Maxim Integrated 12-4MAX31782 User’s GuideRevision 0; 8/1112.1.2 Up/Down Count with Auto-ReloadThe 16-Bit up/down count auto-reload mode is enabl

Maxim Integrated 12-5MAX31782 User’s GuideRevision 0; 8/1112.1.3 Capture ModeThe Timer B 16-bit capture mode is configured by setting the CP/RLB

Maxim Integrated 12-6MAX31782 User’s GuideRevision 0; 8/1112.1.4 Clock Output ModeThe Timer B can be configured to drive a clock output on the TB

Maxim Integrated 12-7MAX31782 User’s GuideRevision 0; 8/11Figure 12-5. PWM Output Mode Block Diagram12.1.5 PWM Output ModeThe PWM output mode is

Maxim Integrated 2-7MAX31782 User’s GuideRevision 0; 8/11Figure 2-2. Program Memory MappingPROGRAMSPACEFFFFhA3FFh8FFFh7FFFh3FFFh8000h4000h0000hA000

Maxim Integrated 12-8MAX31782 User’s GuideRevision 0; 8/1112.1.5.1 Up Count PWM Output ModeWhen operating in PWM output mode and configured for u

Maxim Integrated 12-9MAX31782 User’s GuideRevision 0; 8/1112.1.5.2 Up/Down Count PWM Output ModeThe Timer B can also operate in an up/down cou

Maxim Integrated 12-10MAX31782 User’s GuideRevision 0; 8/1112.2 Timer B Register DescriptionsThe following peripheral registers are used to contro

Maxim Integrated 12-11MAX31782 User’s GuideRevision 0; 8/1112.2.2 Timer B Value Register (TB0V)Register Address: M0[0Bh]The Timer B value register

Maxim Integrated 12-12MAX31782 User’s GuideRevision 0; 8/1112.3 Timer B Code Examples12.3.1 Auto-Reload ModeCreating a 10ms interrupt (10ms at 4MH

Maxim Integrated 13-1MAX31782 User’s GuideRevision 0; 8/11SECTION 13: SUPPLY VOLTAGE MONITORThe MAX31782 provides features to allow monitoring of

Maxim Integrated 14-1MAX31782 User’s GuideRevision 0; 8/11SECTION 14: HARDWARE MULTIPLIER14.1 Hardware Multiplier Organization . . . . . . . . .

Maxim Integrated 14-2MAX31782 User’s GuideRevision 0; 8/11SECTION 14: Hardware MultiplierThe hardware multiplier module can be used by the MAX317

Maxim Integrated 14-3MAX31782 User’s GuideRevision 0; 8/1114.2 Hardware Multiplier ControlsThe selection of operation to be performed by the m

Maxim Integrated 14-4MAX31782 User’s GuideRevision 0; 8/11most significant bit of the MC register occurs. For a signed two’s-complement multiply-a

Maxim Integrated 2-8MAX31782 User’s GuideRevision 0; 8/112.4.3.2 Frame PointerThe frame pointer (BP[OFFS]) is formed by the 16-bit unsigned addit

Maxim Integrated 14-5MAX31782 User’s GuideRevision 0; 8/11Table 14-2. Hardware Multiplier Registers14.5 Hardware Multiplier Peripheral RegistersT

Maxim Integrated 14-6MAX31782 User’s GuideRevision 0; 8/1114.5.1 Multiplier Control Register (MCNT)Bit7 6 5 4 3 2 1 0Name OF MCW CLD SQU OPCS MSUB

Maxim Integrated 14-7MAX31782 User’s GuideRevision 0; 8/1114.5.2 Multiplier Operand A Register (MA)Multiplier Operand A Register. This operand

Maxim Integrated 14-8MAX31782 User’s GuideRevision 0; 8/1114.5.7 Multiplier Read Register 1 (MC1R)Multiplier Read Register 1: The MC1R register r

Maxim Integrated 14-9MAX31782 User’s GuideRevision 0; 8/11;SignedMultiply-Accumulate16-bitx16-bit    ;MC2:0=0000_0100_0001hmove MCNT,

Maxim Integrated 15-1MAX31782 User’s GuideRevision 0; 8/11SECTION 15: WATCHDOG TIMER15.1 Watchdog Timer Description . . . . . . . . . . . . . . . .

Maxim Integrated 15-2MAX31782 User’s GuideRevision 0; 8/11SECTION 15: WATCHDOG TIMERThe watchdog timer is a user-programmable clock counter that c

Maxim Integrated 15-3MAX31782 User’s GuideRevision 0; 8/1115.1 Watchdog Timer DescriptionWhen the watchdog timer is enabled, it begins counting sys

Maxim Integrated 15-4MAX31782 User’s GuideRevision 0; 8/1115.2.4 Watchdog Timer Control Register (WDCN)*Bits 5, 4, 3 and 0 are cleared to 0 on al

Maxim Integrated 16-1MAX31782 User’s GuideRevision 0; 8/11SECTION 16: TEST ACCESS PORT (TAP)16.1 TAP Controller . . . . . . . . . . . . . . . . .

Maxim Integrated 2-9MAX31782 User’s GuideRevision 0; 8/11Figure 2-3. Memory Map When Executing from Flash Memory2.4.4.1 Memory Map When Executing

Maxim Integrated 16-2MAX31782 User’s GuideRevision 0; 8/11SECTION 16: TEST ACCESS PORT (TAP)The MAX31782 incorporates a test access port (TAP) and

Maxim Integrated 16-3MAX31782 User’s GuideRevision 0; 8/1116.1 TAP ControllerThe TAP controller is a synchronous state machine that responds to cha

Maxim Integrated 16-4MAX31782 User’s GuideRevision 0; 8/1116.2 TAP State ControlThe TAP provides an independent serial channel to communicate syn

Maxim Integrated 16-5MAX31782 User’s GuideRevision 0; 8/11Table 16-3. Instruction Register (IR[2:0]) EncodingsWhen the parallel instruction regi

Maxim Integrated 16-6MAX31782 User’s GuideRevision 0; 8/1116.3 Communication via TAPThe TAP controller is in Test-Logic-Reset state after a power

Maxim Integrated 16-7MAX31782 User’s GuideRevision 0; 8/11Figure 16-4. TAP Controller Debug Mode DR-Scan ExampleOLD DATANEW DATADATA REGISTERTCKT

Maxim Integrated 17-1MAX31782 User’s GuideRevision 0; 8/11SECTION 17: IN-CIRCUIT DEBUG MODE17.1 Background Mode Operation . . . . . . . . . . . .

Maxim Integrated 17-2MAX31782 User’s GuideRevision 0; 8/11SECTION 17: IN-CIRCUIT DEBUG MODEThe MAX31782 is equipped with embedded debug hardwa

Maxim Integrated 17-3MAX31782 User’s GuideRevision 0; 8/11The data byte portion of the 10-bit shift register is interfaced directly to the ICD

Maxim Integrated 17-4MAX31782 User’s GuideRevision 0; 8/11Table 17-2. Background Mode Commands (continued)OP CODE COMMAND OPERATION0000–0011 Read

Maxim Integrated 2-10MAX31782 User’s GuideRevision 0; 8/112.4.4.2 Memory Map When Executing from Utility ROMWhen executing from the utility ROM:•

Maxim Integrated 17-5MAX31782 User’s GuideRevision 0; 8/1117.1.1 Breakpoint RegistersThe MAX31782 incorporates six breakpoint registers (BP0–BP5)

Maxim Integrated 17-6MAX31782 User’s GuideRevision 0; 8/1117.1.1.4 Breakpoint 3 Register (BP3)The breakpoint 3 register is accessible only via b

Maxim Integrated 17-7MAX31782 User’s GuideRevision 0; 8/11When REGE = 1: This register serves as one of the two register breakpoints. The dest

Maxim Integrated 17-8MAX31782 User’s GuideRevision 0; 8/11Once in Debug mode, further breakpoint matches or host issuance of the Debug command are

Maxim Integrated 17-9MAX31782 User’s GuideRevision 0; 8/11Table 17-3. Debug Mode CommandsOP CODE COMMAND OPERATION0010–0000 No OperationNo operat

Maxim Integrated 17-10MAX31782 User’s GuideRevision 0; 8/1117.2.2 Read Register Map Command Host-ROM InteractionA read register map command reads

Maxim Integrated 17-11MAX31782 User’s GuideRevision 0; 8/11Table 17-4. Output from Read Register Map Command17.2.3 Single Step Operation (Trace)Th

Maxim Integrated 17-12MAX31782 User’s GuideRevision 0; 8/11Note that the trace operation uses a return address from the stack as a legitimate

Maxim Integrated 17-13MAX31782 User’s GuideRevision 0; 8/1117.3 In-Circuit Debug Peripheral RegistersThe following peripheral registers are us

Maxim Integrated 17-14MAX31782 User’s GuideRevision 0; 8/11r = read, s = special17.3.3 In-Circuit Debug Control Register (ICDC, M2[1Ah])Bit7 6

Maxim Integrated 2-11MAX31782 User’s GuideRevision 0; 8/112.4.4.3 Memory Map When Executing from SRAMWhen executing from the SRAM:The utility ROM c

Maxim Integrated 17-15MAX31782 User’s GuideRevision 0; 8/1117.3.5 In-Circuit Debug Buffer Register (ICDB, M2[1Ch])This register serves as the

Maxim Integrated 17-16MAX31782 User’s GuideRevision 0; 8/1117.3.6 In-Circuit Debug Address Register (ICDA, M2[1Dh])This register is used by the de

Maxim Integrated 18-1MAX31782 User’s GuideRevision 0; 8/11SECTION 18: IN-SYSTEM PROGRAMMING18.1 Detailed Description. . . . . . . . . . . . . . .

Maxim Integrated 18-2MAX31782 User’s GuideRevision 0; 8/11LIST OF TABLESTable 18-1. System Programming Buffer (SPB) . . . . . . . . . . . . . . . .

Maxim Integrated 18-3MAX31782 User’s GuideRevision 0; 8/11SECTION 18: IN-SYSTEM PROGRAMMINGThe MAX31782 contains an internal bootstrap loader ut

Maxim Integrated 18-4MAX31782 User’s GuideRevision 0; 8/11If SPE is not set, the MAX31782 then enables the slave I2C interface. The I2C_SPE bit i

Maxim Integrated 18-5MAX31782 User’s GuideRevision 0; 8/11Following a reset, if the system programming buffer is set for JTAG bootloading, the

Maxim Integrated 18-6MAX31782 User’s GuideRevision 0; 8/1118.1.4 I2C System Programming Buffer Register (I2C�SPB)Table 18-4. Example Bootload

Maxim Integrated 18-7MAX31782 User’s GuideRevision 0; 8/114) Possibly poll returned data until command execution completes.5) Transmit 00h on

Maxim Integrated 18-8MAX31782 User’s GuideRevision 0; 8/1118.3 Bootloader CommandsCommands for the MAX31782 loader are grouped into families. A

Maxim Integrated 2-12MAX31782 User’s GuideRevision 0; 8/112.5 Data AlignmentTo support merged program and data memory operation while maintainin

Maxim Integrated 18-9MAX31782 User’s GuideRevision 0; 8/1118.3.3 Command 02h—Master EraseThis command erases (sets to FFFFh) all words in the

Maxim Integrated 18-10MAX31782 User’s GuideRevision 0; 8/1118.3.6 Command 05h—Get Supported CommandsThe SupportL (LSB) and SupportH (MSB) bytes f

Maxim Integrated 18-11MAX31782 User’s GuideRevision 0; 8/1118.3.9 Command 08h—Get Loader VersionThis command returns the device’s bootloader vers

Maxim Integrated 18-12MAX31782 User’s GuideRevision 0; 8/11The JTAG bootloader also supports polling using the status bits as a method to dete

Maxim Integrated 18-13MAX31782 User’s GuideRevision 0; 8/1118.3.16 Command 30h—CRC CodeThis command returns the CRC-16 value (CRCH:CRCL) of th

Maxim Integrated MAX31782 User’s GuideRevision 0; 8/1118.3.20 Command 50h—Load and Verify CodeThis command provides the combined functionality

Maxim Integrated 19-1MAX31782 User’s GuideRevision 0; 8/11SECTION 19: PROGRAMMING19.1 Addressing Modes. . . . . . . . . . . . . . . . . . . .

Maxim Integrated 19-2MAX31782 User’s GuideRevision 0; 8/11SECTION 19: PROGRAMMINGThe following section provides a programming overview of the

Maxim Integrated 19-3MAX31782 User’s GuideRevision 0; 8/11does not require a prefixing operation even though the register DP[0] is 16-bit. This i

Maxim Integrated 19-4MAX31782 User’s GuideRevision 0; 8/1119.3.4 Moving Values Between Registers of Different SizesBefore covering some trans

Maxim Integrated 2-13MAX31782 User’s GuideRevision 0; 8/112.6.2 Watchdog Timer ResetThe watchdog timer is a programmable hardware timer that ca

Maxim Integrated 19-5MAX31782 User’s GuideRevision 0; 8/11High (16-bit destination) ← 8-bit sourceTo modify only the high byte of a given 16-b

19-6MAX31782 User’s GuideRevision 0; 8/1119.5 Using the Arithmetic and Logic UnitThe MAX31782 provides a 16-bit ALU, which allows operations t

Maxim Integrated 19-7MAX31782 User’s GuideRevision 0; 8/11• MOVE Acc, src (Copy data from source to active accumulator)• MOVE dst, Acc (Copy

Maxim Integrated 19-8MAX31782 User’s GuideRevision 0; 8/11For this example, assume that all 16 accumulator registers are initially set to zero

Maxim Integrated 19-9MAX31782 User’s GuideRevision 0; 8/1119.5.5 ALU Bit Operations Using Only the Active AccumulatorThe following operations o

Maxim Integrated 19-10MAX31782 User’s GuideRevision 0; 8/1119.6.3 Equals FlagThe Equals flag (PSF.0) is a static flag set by the CMP instructio

Maxim Integrated 19-11MAX31782 User’s GuideRevision 0; 8/1119.6.5 Overflow FlagThe Overflow flag (PSF.2) is a static flag indicating that the ca

Maxim Integrated 19-12MAX31782 User’s GuideRevision 0; 8/1119.7.3 Conditional JumpsConditional jumps transfer program execution based on the val

Maxim Integrated 19-13MAX31782 User’s GuideRevision 0; 8/1119.7.5 Looping OperationsLooping over a section of code can be performed by using the

Maxim Integrated 19-14MAX31782 User’s GuideRevision 0; 8/1119.7.6 Conditional ReturnsSimilar to the conditional jumps, the MAX31782 also suppo

Maxim Integrated 2-14MAX31782 User’s GuideRevision 0; 8/112.7 Clock GenerationThe MAX31782 generates its 4MHz instruction clock using an

Maxim Integrated 19-15MAX31782 User’s GuideRevision 0; 8/11To support high priority interrupts while servicing another interrupt source, the IMR

Maxim Integrated 19-16MAX31782 User’s GuideRevision 0; 8/1119.9 Accessing the StackThe hardware stack is used automatically by the CALL, RET a

Maxim Integrated 19-17MAX31782 User’s GuideRevision 0; 8/11Either of the data pointers may be post-incremented or post-decremented following an

Maxim Integrated 19-18MAX31782 User’s GuideRevision 0; 8/11Once the pointer selection has been made, it remains in effect until:• The source

Maxim Integrated 20-1MAX31782 User’s GuideRevision 0; 8/11SECTION 20: INSTRUCTION SET SUMMARYTable 20-1. Instruction Set SummaryMNEMONICDESCRI

Maxim Integrated 20-2MAX31782 User’s GuideRevision 0; 8/11Table 20-1. Instruction Set Summary (continued)Note 1: The active accumulator (Acc)

Maxim Integrated 20-3MAX31782 User’s GuideADD/ADDC src Add/Add with CarryDescription: The ADD instruction sums the active accumulator (Acc or A[A

Maxim Integrated 20-4MAX31782 User’s GuideRevision 0; 8/11AND src Logical ANDDescription: Performs a logical-AND between the active accumul

Maxim Integrated 20-5MAX31782 User’s GuideRevision 0; 8/11{L/S}CALL src {Long/Short} Call to SubroutineDescription: Performs a call to the

Maxim Integrated 20-6MAX31782 User’s GuideRevision 0; 8/11CMP src Compare AccumulatorDescription: Compare for equality between the active a

Maxim Integrated 3-1MAX31782 User’s GuideRevision 0; 8/11SECTION 3: SYSTEM REGISTER DESCRIPTIONS3.1 System Register Bit Descriptions. . . . .

Maxim Integrated 20-7MAX31782 User’s GuideRevision 0; 8/11CPL C Complement Carry FlagDescription: Logically complements the Carry (C) Flag.St

Maxim Integrated 20-8MAX31782 User’s GuideRevision 0; 8/11{L/S} JUMP src Unconditional {Long/Short} JumpDescription: Performs an unconditio

Maxim Integrated 20-9MAX31782 User’s GuideRevision 0; 8/11{L/S}JUMP C/{L/S}JUMP NC, src, Conditional {Long/Short} Jump on Status FlagL/S}JUMP

Maxim Integrated 20-10MAX31782 User’s GuideRevision 0; 8/11JUMP NZ Z=0: IP ← IP + src (relative) -or- src (absolute)Operation: Z=1: IP ← IP

Maxim Integrated 20-11MAX31782 User’s GuideRevision 0; 8/11MOVE dst, src Move DataDescription: Moves data from a specified source (src) to

Maxim Integrated 20-12MAX31782 User’s GuideRevision 0; 8/11MOVE dst, src (continued) Move DataTable 20-3. Destination Specifier CodesData Transf

Maxim Integrated 20-13MAX31782 User’s GuideRevision 0; 8/11Example(s): MOVE A[0], A[3] ; A[0] ← A[3] MOVE DP[0], #110h ; DP[0] ← #0110h

Maxim Integrated 20-14MAX31782 User’s GuideRevision 0; 8/11MOVE C, Acc.<b> Move Accumulator Bit to Carry FlagDescription: Replaces the

Maxim Integrated 20-15MAX31782 User’s GuideRevision 0; 8/11MOVE C, #1 Set Carry FlagDescription: Sets the Carry (C) processor status flag.Stat

Maxim Integrated 20-16MAX31782 User’s GuideRevision 0; 8/11NEG Negate AccumulatorDescription: Performs a negation (two’s complement) of the a

Maxim Integrated iMAX31782 User’s GuideRevision 0; 8/11TABLE OF CONTENTSSECTION 1: Overview . . . . . . . . . . . . . . . . . . . . . . . . .

Maxim Integrated 3-2MAX31782 User’s GuideRevision 0; 8/11SECTION 3: SYSTEM REGISTER DESCRIPTIONSMost MAX31782 functions are controlled by sets of

Maxim Integrated 20-17MAX31782 User’s GuideRevision 0; 8/11OR Acc.<b> Logical OR Carry Flag with Accumulator BitDescription: Performs a

Maxim Integrated 20-18MAX31782 User’s GuideRevision 0; 8/11POPI dst Pop Word from the Stack Enable InterruptsDescription: Pops a single word

Maxim Integrated 20-19MAX31782 User’s GuideRevision 0; 8/11RET Return from SubroutineDescription: RET pops a single word from the stack (@SP)

Maxim Integrated 20-20MAX31782 User’s GuideRevision 0; 8/11RET NCOperation: C=0: IP ← @SP-- C=1: IP ← IP +1Encoding: 15 01110 11000000 1101

Maxim Integrated 20-21MAX31782 User’s GuideRevision 0; 8/11RETI Return from InterruptDescription: RETI pops a single word from the stack (@SP)

Maxim Integrated 20-22MAX31782 User’s GuideRevision 0; 8/11RETI ZOperation: Z=1: IP ← @SP-- INS ← 0 Z=0: IP ← IP + 1Encoding: 15 01001

Maxim Integrated 20-23MAX31782 User’s GuideRevision 0; 8/11RL/RLC Rotate Left Accumulator Carry Flag (Ex/In)clusiveDescription: Rotates the

Maxim Integrated 20-24MAX31782 User’s GuideRevision 0; 8/11RR/RRC Rotate Right Accumulator Carry Flag (Ex/In)clusiveDescription: Rotates the

Maxim Integrated 20-25MAX31782 User’s GuideRevision 0; 8/11SLA/SLA2/SLA4 Shift Accumulator Left Arithmetically One, Two, or Four TimesDescript

Maxim Integrated 20-26MAX31782 User’s GuideRevision 0; 8/11SR/SRA/SRA2/SRA4 Shift Accumulator Right/Shift Accumulator Right Arithmetically One

Maxim Integrated 3-3MAX31782 User’s GuideRevision 0; 8/11Table 3-2. System Register Bit FunctionsREGISTERBIT15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0AP

Maxim Integrated 20-27MAX31782 User’s GuideRevision 0; 8/11SRA2 Operation: 15 Active Accumulator (Acc) 0 Carry Flag Acc.[13:0] ← Acc.[15:2

Maxim Integrated 20-28MAX31782 User’s GuideRevision 0; 8/11SUB/SUBB src Subtract /Subtract with BorrowDescription: Subtracts the specified s

Maxim Integrated 20-29MAX31782 User’s GuideRevision 0; 8/11XCH Exchange Accumulator BytesDescription: Exchanges the upper and lower bytes of t

Maxim Integrated 20-30MAX31782 User’s GuideRevision 0; 8/11XOR src Logical XORDescription: Performs a logical-XOR between the active accumul

Maxim Integrated 21-1MAX31782 User’s GuideRevision 0; 8/11SECTION 21: UTILITY ROM21.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . .

Maxim Integrated 21-2MAX31782 User’s GuideRevision 0; 8/11SECTION 21: UTILITY ROM21.1 OverviewThe MAX31782 utility ROM includes routines that

Maxim Integrated 21-3MAX31782 User’s GuideRevision 0; 8/1121.2 In-Application Programming Functions21.2.1 UROM�flashWriteNotes:• This functio

Maxim Integrated 21-4MAX31782 User’s GuideRevision 0; 8/1121.3 Data Transfer FunctionsThe MAX31782 cannot access data from the same memory segmen

Maxim Integrated 21-5MAX31782 User’s GuideRevision 0; 8/1121.3.1 UROM�moveDP0Notes:• Before calling this function, DPC should be set appropri

Maxim Integrated 21-6MAX31782 User’s GuideRevision 0; 8/1121.3.4 UROM�moveDP1Notes:• Before calling this function, DPC should be set appropria

Maxim Integrated 3-4MAX31782 User’s GuideRevision 0; 8/113.1 System Register Bit Descriptions3.1.1 Accumulator Pointer Register (AP, 8h[0h])Initia

Maxim Integrated 21-7MAX31782 User’s GuideRevision 0; 8/1121.3.7 UROM�moveBPNotes:• Before calling this function, DPC should be set appropria

Maxim Integrated 21-8MAX31782 User’s GuideRevision 0; 8/1121.3.10 UROM�copyBufferNotes:• This function can be used to copy from program flash

Maxim Integrated 21-9MAX31782 User’s GuideRevision 0; 8/1121.4 Utility ROM Examples21.4.1 Reading Constant Word Data from FlashUROM_moveDP0inc

MAX31782 User’s GuideRevision 0; 8/11REVISION HISTORYREVISIONNUMBERREVISIONDATEDESCRIPTIONPAGESCHANGED0 8/11 Initial release —223Maxim Integrated 160

Maxim Integrated 3-5MAX31782 User’s GuideRevision 0; 8/113.1.3 Processor Status Flags Register (PSF, 8h[4h])Initialization: This register is clea

3-6MAX31782 User’s GuideRevision 0; 8/113.1.5 Interrupt Mask Register (IMR, 8h[6h])Initialization: This register is cleared to 00h on all forms of

Maxim Integrated 3-7MAX31782 User’s GuideRevision 0; 8/113.1.7 Interrupt Identification Register (IIR, 8h[Bh])Initialization: This register is cle

3-8MAX31782 User’s GuideRevision 0; 8/113.1.9 Watchdog Control Register (WDCN, 8h[Fh])Initialization: Bits 5, 4, 3, and 0 are cleared to 0 on

Maxim Integrated 3-9MAX31782 User’s GuideRevision 0; 8/113.1.10 Accumulator n Register (A[n], 9h[nh])Initialization: This register is cleared

Maxim Integrated 3-10MAX31782 User’s GuideRevision 0; 8/113.1.13 Stack Pointer Register (SP, Dh[1h])Initialization: This register is cleared to

Maxim Integrated 3-11MAX31782 User’s GuideRevision 0; 8/113.1.18 Data Pointer Control Register (DPC, Eh[4h])Initialization: This register is cleare

Maxim Integrated 1-1MAX31782 User’s GuideRevision 0; 8/11SECTION 1: OVERVIEWThe MAX31782 system management microcontroller provides a complete

Maxim Integrated 3-12MAX31782 User’s GuideRevision 0; 8/113.1.21 Frame Pointer Base Register (BP, Eh[7h])Initialization: This register is cleared t

Maxim Integrated 3-13MAX31782 User’s GuideRevision 0; 8/113.1.27 Data Pointer 1 Register (DP[1], Fh[7h])Initialization: This register is cleared

Maxim Integrated 4-1MAX31782 User’s GuideRevision 0; 8/11The MAX31782 has six peripheral register modules, Modules 0 through 5. Thi

Maxim Integrated 4-2MAX31782 User’s GuideRevision 0; 8/11Table 4-2. Peripheral Register Bit FunctionsMODULE 0REGISTER INDEX 15 14 13 12 11 10 9 8

Maxim Integrated 4-3MAX31782 User’s GuideRevision 0; 8/11Table 4-2. Peripheral Register Bit Functions (continued)MODULE 2REGISTER INDEX 15 14 13 1

Maxim Integrated 4-4MAX31782 User’s GuideRevision 0; 8/11Table 4-2. Peripheral Register Bit Functions (continued)MODULE 4REGISTER INDEX 15 14

Maxim Integrated 5-1MAX31782 User’s GuideRevision 0; 8/11SECTION 5: INTERRUPTS5.1 Servicing Interrupts . . . . . . . . . . . . . . . . . . . . .

Maxim Integrated 5-2MAX31782 User’s GuideRevision 0; 8/11SECTION 5: INTERRUPTSThe MAX31782 provides a single, programmable interrupt vector (IV

Maxim Integrated 5-3MAX31782 User’s GuideRevision 0; 8/11Figure 5-1. Interrupt HierarchyWDCN.WDIFWATCHDOG INTERRUPTSWDCN.EWDI (LOCAL ENABLE)II

Maxim Integrated 5-4MAX31782 User’s GuideRevision 0; 8/11Table 5-1. Interrupt Sources and Control BitsINTERRUPT INTERRUPT FLAG LOCAL ENABLE BITMO

Maxim Integrated 1-2MAX31782 User’s GuideRevision 0; 8/11Some of the resources and features that the MAX31782 provides for monitoring

Maxim Integrated 5-5MAX31782 User’s GuideRevision 0; 8/115.2 Module Interrupt Identification RegistersThe MIIR registers are implemented to ind

Maxim Integrated 5-6MAX31782 User’s GuideRevision 0; 8/115.2.3 Peripheral Module 2 Interrupt Identification Register (MIIR2, M2[03h])5.2.4 Peripher

Maxim Integrated 5-7MAX31782 User’s GuideRevision 0; 8/115.2.6 Peripheral Module 5 Interrupt Identification Register (MIIR5, M5[18h])5.3 Interrup

Maxim Integrated 5-8MAX31782 User’s GuideRevision 0; 8/115.3.2 Interrupt Prioritization by SoftwareAll interrupt sources of the MAX31782 natur

Maxim Integrated 6-1MAX31782 User’s GuideRevision 0; 8/11SECTION 6: ANALOG-TO-DIGITAL CONVERTER (ADC)6.1 Detailed Description. . . . . . . . . . .

Maxim Integrated 6-2MAX31782 User’s GuideRevision 0; 8/11SECTION 6: ANALOG-TO-DIGITAL CONVERTER (ADC)The MAX31782 contains a 12-bit analog-to-digi

Maxim Integrated 6-3MAX31782 User’s GuideRevision 0; 8/116.1.2 Conversion SequencingThe MAX31782 ADC performs a user-defined sequence of up to eig

Maxim Integrated 6-4MAX31782 User’s GuideRevision 0; 8/11The time required for the ADC to make a temperature measurement is greater

Maxim Integrated 6-5MAX31782 User’s GuideRevision 0; 8/116.1.4 ADC Data ReadingThe ADC has a circular data buffer that holds the results from 1

Maxim Integrated 6-6MAX31782 User’s GuideRevision 0; 8/116.2 ADC Register DescriptionsThe ADC is controlled by ADC SFR registers. Four of the r

Maxim Integrated 2-1MAX31782 User’s GuideRevision 0; 8/11SECTION 2: ARCHITECTURE2.1 Instruction Decoding . . . . . . . . . . . . . . . . . . . .

Maxim Integrated 6-7MAX31782 User’s GuideRevision 0; 8/116.2.2 ADC Status Register (ADST)Register Address: M2[06h]6.2.3 ADC Address Register (ADA

Maxim Integrated 6-8MAX31782 User’s GuideRevision 0; 8/116.2.4 ADC Data and Configuration Register (ADDATA)Register Address: M2[09h]The ADDATA re

Maxim Integrated 6-9MAX31782 User’s GuideRevision 0; 8/116.2.4.2 ADC Data Buffer (ADDATA when ADCFG = 0)When ADCFG = 0, reading from the ADDATA r

Maxim Integrated 6-10MAX31782 User’s GuideRevision 0; 8/116.2.5 External Temperature Slope Control Register (ETS)Register Address: M1[16h]The

Maxim Integrated 6-11MAX31782 User’s GuideRevision 0; 8/116.2.6 ADC External Temperature Offset Register (TOEX)Register Address: M1[1Ah]The TOEX

Maxim Integrated 6-12MAX31782 User’s GuideRevision 0; 8/116.3 ADC Code Examples6.3.1 One Sequence of Four Temperature and Voltage ConversionsADCN

Maxim Integrated 6-13MAX31782 User’s GuideRevision 0; 8/116.3.2 Continuous Conversion of 16 SamplesADCN_bit.IREFEN=1; //enabletheinternalre

Maxim Integrated 7-1MAX31782 User’s GuideRevision 0; 8/11SECTION 7: I2C-COMPATIBLE SLAVE INTERFACE7.1 Detailed Description. . . . . . . . . .

Maxim Integrated 7-2MAX31782 User’s GuideRevision 0; 8/11SECTION 7: I2C-COMPATIBLE SLAVE INTERFACEThe MAX31782 provides an I2C-compatible

Maxim Integrated 7-3MAX31782 User’s GuideRevision 0; 8/117.1.2 Slave AddressPrior to communication, an I2C slave address may need to be selected. Th

Maxim Integrated 2-2MAX31782 User’s GuideRevision 0; 8/11SECTION 2: ARCHITECTUREThe MAX31782 contains a MAXQ20 low-cost, high-performance, CMOS, f

Maxim Integrated 7-4MAX31782 User’s GuideRevision 0; 8/117.1.6 Transmitting DataThe MAX31782 I2C slave controller enters into data transmission m

Maxim Integrated 7-5MAX31782 User’s GuideRevision 0; 8/11• Clears the I2CST_S.I2CBUSY flag to indicate that the I2C slave controller is not acti

Maxim Integrated 7-6MAX31782 User’s GuideRevision 0; 8/117.1.8 Clock StretchingIf a slave device cannot receive or transmit another complete byte

Maxim Integrated 7-7MAX31782 User’s GuideRevision 0; 8/117.1.9 SMBus TimeoutThe I2C slave controller can also be used for SMBus or PMBus™ commu

Maxim Integrated 7-8MAX31782 User’s GuideRevision 0; 8/117.2 I2C Slave Controller Register DescriptionsThe following registers are used to contro

Maxim Integrated 7-9MAX31782 User’s GuideRevision 0; 8/11*Set by hardware only.7.2.2 I2C Slave Status Register (I2CST�S)Address: M2[01h]Bit15 14

Maxim Integrated 7-10MAX31782 User’s GuideRevision 0; 8/117.2.3 I2C Slave Interrupt Enable Register (I2CIE�S)Address: M2[02h]Bit15 14 13 12 11 10

Maxim Integrated 7-11MAX31782 User’s GuideRevision 0; 8/117.2.4 I2C Slave Address Register (I2CSLA�S)Address: M2[0Fh]7.2.5 I2C Slave Data Buffer Reg

Maxim Integrated 7-12MAX31782 User’s GuideRevision 0; 8/117.2.6 SMBus Mode Selection Register (SMBUS)Address: M3[04h]This register contains bi

Maxim Integrated 8-1MAX31782 User’s GuideRevision 0; 8/11SECTION 8: I2C-COMPATIBLE MASTER INTERFACE8.1 Detailed Description. . . . . . . . . . . .

Maxim Integrated 2-3MAX31782 User’s GuideRevision 0; 8/11This instruction word format presents the following limitations.1) There are 32 registe

Maxim Integrated 8-2MAX31782 User’s GuideRevision 0; 8/11SECTION 8: I2C-COMPATIBLE MASTER INTERFACEThe MAX31782 provides an I2C-compatible master

Maxim Integrated 8-3MAX31782 User’s GuideRevision 0; 8/11there is a rise time that is determined by the capacitive loading and pullup resistance

Maxim Integrated 8-4MAX31782 User’s GuideRevision 0; 8/118.1.5 Generating a STARTTo initiate a data transfer, the I2C master controller must fi

Maxim Integrated 8-5MAX31782 User’s GuideRevision 0; 8/11When the I2CSTART bit is set to a 1, the I2C controller starts its timeout timer

Maxim Integrated 8-6MAX31782 User’s GuideRevision 0; 8/11Upon transmitting the slave data byte (7 bits of slave address + R/W bit + acknowledge),

Maxim Integrated 8-7MAX31782 User’s GuideRevision 0; 8/11Following the 8th bit of data (least significant bit) being shifted to SDA, the SDA line

Maxim Integrated 8-8MAX31782 User’s GuideRevision 0; 8/11If clock stretching is enabled after the 8th clock pulse, the master I2C controller w

Maxim Integrated 8-9MAX31782 User’s GuideRevision 0; 8/118.2 I2C Master Controller Register DescriptionsFollowing are the registers that are u

Maxim Integrated 8-10MAX31782 User’s GuideRevision 0; 8/118.2.2 I2C Master Status Register (I2CST�M)Address: M1[01h]*Set by hardware only.Bit15 14

Maxim Integrated 8-11MAX31782 User’s GuideRevision 0; 8/118.2.3 I2C Master Interrupt Enable Register (I2CIE�M)Address: M1[02h]8.2.4 I2C Master

Maxim Integrated 2-4MAX31782 User’s GuideRevision 0; 8/11Registers can be 8 or 16 bits in length. Some registers can contain reserved bits. T

Maxim Integrated 8-12MAX31782 User’s GuideRevision 0; 8/118.2.5 I2C Master Clock Control Register (I2CCK�M)Address: M1[0Dh]8.2.6 I2C Master Timeou

Maxim Integrated 8-13MAX31782 User’s GuideRevision 0; 8/118.2.8 SMBus Mode Selection Register (SMBUS)Address: M3[04h]This register contains bits

Maxim Integrated 9-1MAX31782 User’s GuideRevision 0; 8/11SECTION 9: PWM OUTPUTS9.1 Detailed Description. . . . . . . . . . . . . . . . . . . .

Maxim Integrated 9-2MAX31782 User’s GuideRevision 0; 8/11SECTION 9: PWM OUTPUTSThe MAX31782 provides six independent PWM output pins that can b

Maxim Integrated 9-3MAX31782 User’s GuideRevision 0; 8/119.1 Detailed Description9.1.1 PWM Pin Mapping and GPIO MuliplexingTable 9-1 shows the m

Maxim Integrated 9-4MAX31782 User’s GuideRevision 0; 8/11Figure 9-2. PWM Output Waveform in Normal PWM Output Mode9.1.3 Normal PWM Output Operati

Maxim Integrated 9-5MAX31782 User’s GuideRevision 0; 8/119.1.4 Up/Down Count PWM Output OperationThe PWM can also operate in an up/down count c

Maxim Integrated 9-6MAX31782 User’s GuideRevision 0; 8/119.2 PWM Output Register DescriptionsThe following peripheral registers are used to con

Maxim Integrated 9-7MAX31782 User’s GuideRevision 0; 8/119.2.2 PWM Value Register (PWMVn)The PWM value register, PWMVn, holds the 16-bit valu

Maxim Integrated 10-1MAX31782 User’s GuideRevision 0; 8/11SECTION 10: FAN TACHOMETER10.1 Fan Tachometer Detailed Description . . . . . . . . .

Maxim Integrated 2-5MAX31782 User’s GuideRevision 0; 8/112.3.2 SRAM MemoryThe MAX31782 contains 1KWords (1K x 16) of SRAM memory. The SRAM memory

Maxim Integrated 10-2MAX31782 User’s GuideRevision 0; 8/11SECTION 10: FAN TACHOMETERThe MAX31782 provides six independent fan tachometers that

Maxim Integrated 10-3MAX31782 User’s GuideRevision 0; 8/1110.1 Fan Tachometer Detailed DescriptionWhen a tachometer is initially enabled (TACH

Maxim Integrated 10-4MAX31782 User’s GuideRevision 0; 8/1110.2.1 Tachometer Control Register (TACHCNn)The tachometer control register, TACHCNn, is

Maxim Integrated 10-5MAX31782 User’s GuideRevision 0; 8/1110.2.2 Tachometer Value Register (TACHVn)The tachometer value register, TACHVn, holds

Maxim Integrated 10-6MAX31782 User’s GuideRevision 0; 8/1110.4 Tachometer Code ExampleThe following pseudocode shows how to set up tachomet

Maxim Integrated 11-1MAX31782 User’s GuideRevision 0; 8/11SECTION 11: GENERAL-PURPOSE INPUT/OUTPUT (GPIO) PINS11.1 GPIO Port 1 Register Descriptio

Maxim Integrated 11-2MAX31782 User’s GuideRevision 0; 8/11SECTION 11: GENERAL-PURPOSE INPUT/OUTPUT (GPIO) PINSThe MAX31782 provides general-purpo

Maxim Integrated 11-3MAX31782 User’s GuideRevision 0; 8/11From a software perspective, each of the GPIO ports (port 1, port 2, and port 6) has

Maxim Integrated 11-4MAX31782 User’s GuideRevision 0; 8/1111.1 GPIO Port 1 Register DescriptionsPort 1 provides six GPIO pins that are multiplexe

Maxim Integrated 11-5MAX31782 User’s GuideRevision 0; 8/1111.2 GPIO Port 2 Register DescriptionsPort 2 provides eight GPIO pins that are