Maxim-integrated MAX31782 Manual do Utilizador Página 37

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Maxim Integrated 5-2
MAX31782 User’s Guide
Revision 0; 8/11
SECTION 5: INTERRUPTS
The MAX31782 provides a single, programmable interrupt vector (IV) that can be used to handle internal and external
interrupts. Interrupts can be generated from system level sources (e.g., watchdog timer) or by sources associated with
the peripheral modules. Only one interrupt can be handled at a time, and all interrupts naturally have the same priority.
A programmable interrupt mask register (IMR) allows software-controlled prioritization and nesting of high-priority inter-
rupts. Figure 5-1 shows a diagram of the interrupt hierarchy.
5.1 Servicing Interrupts
For the MAX31782 to service an interrupt, interrupts must be enabled globally, modularly, and locally. The interrupt
global enable (IGE) bit located in the interrupt and control (IC) register acts as a global interrupt mask. This bit defaults
to 0, and it must be set to 1 before any interrupt takes place.
The local interrupt-enable bit for a particular source is in one of the peripheral registers associated with that peripheral
module, or in a system register for any system interrupt source. Between the global and local enables are intermedi-
ate per-module and system interrupt mask bits. These mask bits reside in the interrupt mask system register (IMR).
By implementing intermediate per-module masking capability in a single register, interrupt sources spanning multiple
modules can be selectively enabled/disabled in a single instruction. This promotes a simple, fast, and user-definable
interrupt prioritization scheme. The interrupt source-enable hierarchy is illustrated in Figure 5-1 as well as Table 5-1.
When an interrupt condition occurs, its individual flag is set, even if the interrupt source is disabled at the local, module,
or global level. Interrupt flags must be cleared within the user interrupt routine to avoid repeated interrupts from the
same source.
Since all interrupts vector to the address contained in the interrupt vector register (IV), the interrupt identification reg-
ister (IIR) can be used by the interrupt service routine to determine the module source of an interrupt. The IIR register
contains a bit flag for each peripheral module and one flag associated with all system interrupts; if the bit for a module
is set, then an interrupt is pending that was initiated by that module.
The MAX31782 provides two ways to determine which block inside a module caused an interrupt to occur. Each module
has a module interrupt identification register (MIIR) that indicates which of the module’s interrupt sources has a pend-
ing interrupt. The peripheral register bits inside the module also provide a way to differentiate among interrupt sources.
Section 5.2 Module Interrupt Identification Registers has more detail on the MIIR registers.
The IV register provides the location of the interrupt service routine. It can be set to any location within program memory.
The IV register defaults to 0000h on reset or power-up, so if it is not changed to a different address, the user program
must determine whether a jump to 0000h came from a reset or interrupt source.
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