Maxim-integrated MAXQ Family Users Guide: MAXQ2010 Supplement Manual do Utilizador Página 96

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MAXQ Family Users Guide:
MAXQ2010 Supplement
20-4
Bits 3:0: LCD Register Adjust (LRA[3:0]). These bits control the resistance of the internal LCD resistor R
ADJ
. The
approximate resistance can be determined as:
R
ADJ
= LCRA[3:0] x 5.33kI
The following registers contain display memory for the LCD controller.
20.2.3 LCD Display Register 0 (LCD0, M2[0Bh])
20.2.4 LCD Display Register 1 (LCD1, M2[0Ch])
20.2.5 LCD Display Register 2 (LCD2, M2[0Dh])
20.2.6 LCD Display Register 3 (LCD3, M2[0Eh])
20.2.7 LCD Display Register 4 (LCD4, M2[0Fh])
20.2.8 LCD Display Register 5 (LCD5, M2[10h])
Bit #
7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit #
7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit #
7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit #
7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit #
7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit #
7 6 5 4 3 2 1 0
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
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