Maxim-integrated MAXQ7666 Manual do Utilizador descarregar pdf (Página 203)

5.2.2 Oscillator Control Register (OSCC)

The OSCC register contains the oscillator enable and configuration bits.

Bits 15 to 12, 4, and 3: Reserved. Read 0, write ignored.

Bits 11 and 10: High-Frequency Crystal Output Capacitance Select 1 and 0 (HFOC1 and HFOC0). These bits select the output

capacitance of the on-chip high-frequency oscillator. The capacitor value is switched on to the XOUT pin of the MAXQ7665. The pos-

sible selections are given below. Note: For the default 00 setting, only a 1.3pF capacitor is switched on. The 6pF capacitor value is

essentially due to stray capacitance.

Note: For the MAXQ7666, the HFIC1:HFIC0 bits select both the input and output capacitance of the on-chip high-frequency oscillator.

The HFOC1:HFOC0 bits are used to select one of four possible crystal drive strengths as shown in the following table. Refer to the

MAXQ7666 data sheet for typical drive strengths.

MAXQ7665/MAXQ7666 User’s Guide

5-6

Bit #

15 14 13 12 11 10 9 8

Name — — — — HFOC1 HFOC0 HFIC1 HFIC0

Reset 0 0 0 0 0 0 0 0

Access r r r r rw rw rw rw

Bit #

76543210

Name ADCD2 ADCD1 ADCD0 — — EXTHF RCE HFE

Reset 0 0 0 0 0 0 1 0

Access rw rw rw r r rw rw rw

r = read, w = write

Note: This register is cleared to 0002h on power-on reset and is not affected by other forms of reset.

HFOC1 HFOC0

CAPACITOR VALUE

(pF)

0 0 6 (default)

0 1 17

1 0 27

1 1 34

HFOC1 HFOC0 DRIVE STRENGTH

0 0 Drive 2 (default)

0 1 Drive 3 (highest)

1 0 Drive 0 (smallest)

1 1 Drive 1

Maxim Integrated

1 2 ... 198 199 200 201 202 203 204 205 206 207 208 ... 385 386

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Maxim-integrated MAXQ7666 Manual do Utilizador Página 203