MAXQ612/MAXQ622 User’s Guide
Maxim Integrated 6-5
Bits 7:0: Port 3 Output. This register stores the data that is output on any of the pins of port 3 that have been defined
as output pins. If the port pins are in input mode, this register controls the weak pullup enable for each pin. Changing
the data direction of any pins for this port (through register PD3) does not affect the value in this register.
Bits 7:0: Port 4 Output. This register stores the data that is output on any of the pins of port 4 that have been defined
as output pins. If the port pins are in input mode, this register controls the weak pullup enable for each pin. Changing
the data direction of any pins for this port (through register PD4) does not affect the value in this register.
Bits 7:0: Port 5 Output. This register stores the data that is output on any of the pins of port 5 that have been defined
as output pins. If the port pins are in input mode, this register controls the weak pullup enable for each pin. Changing
the data direction of any pins for this port (through register PD5) does not affect the value in this register.
Bits 7:0: Port 6 Output. This register stores the data that is output on any of the pins of port 6 that have been defined
as output pins. If the port pins are in input mode, this register controls the weak pullup enable for each pin. Changing
the data direction of any pins for this port (through register PD6) does not affect the value in this register.
Register Name
PO3
Register Description
Port 3 Output Register
Register Address
M0[03h]
Bit # 7 6 5 4 3 2 1 0
Name PO3.7 PO3.6 PO3.5 PO3.4 PO3.3 PO3.2 PO3.1 PO3.0
Reset s s s s s s s s
Access rw rw rw rw rw rw rw rw
Register Name
PO4
Register Description
Port 4 Output Register
Register Address
M1[04h]
Register Name
PO5
Register Description
Port 5 Output Register
Register Address
M1[01h]
Register Name
PO6
Register Description
Port 6 Output Register
Register Address
M1[02h]
Bit # 7 6 5 4 3 2 1 0
Name PO4.7 PO4.6 PO4.5 PO4.4 PO4.3 PO4.2 PO4.1 PO4.0
Reset s s s s s s s s
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name PO5.7 PO5.6 PO5.5 PO5.4 PO5.3 PO5.2 PO5.1 PO5.0
Reset s s s s s s s s
Access rw rw rw rw rw rw rw rw
Bit # 7 6 5 4 3 2 1 0
Name PO6.7 PO6.6 PO6.5 PO6.4 PO6.3 PO6.2 PO6.1 PO6.0
Reset s s s s s s s s
Access rw rw rw rw rw rw rw rw
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