
MAXQ612/MAXQ622 User’s Guide
16-14 Maxim Integrated
MOVE dst.<b>, #1 Set Bit
Description:
Sets the bit specified by dst.<b>.
Status Flags:
C, E (if dst is PSF)
Operation:
dst.<b> ← 1
Encoding:
15
0
1ddd dddd 1bbb 0111
Example(s):
; M0[0] = 00h
MOVE M0[0].1, #1 ; M0[0] = 02h
MOVE M0[0].7, #1 ; M0[0] = 82h
Special Notes:
Only system module 8 and peripheral modules (0 to 5) are supported by MOVE dst.<b>, #1.
NEG
Negate Accumulator
Description:
Performs a negation (two’s complement) of the active accumulator and returns the result back to the
active accumulator.
Status Flags:
S, Z
Operation:
Acc ← ~Acc + 1
Encoding:
15
0
1000 1010 1001 1010
Example(s):
; Acc = 0FEEDh, S=1, Z=0
NEG ; Acc = 0113h, S=0, Z=0
OR src Logical OR
Description:
Performs a logical-OR between the active accumulator (Acc or A[AP]) and the specified src data.
For the complete list of src specifiers, reference the MOVE instruction. The PFX[n] register may be
used to supply the high byte of data for 8-bit sources.
Status Flags:
S, Z
Operation:
Acc ← Acc OR src
Encoding:
15
0
f010 1010 ssss ssss
Example(s):
; Acc = 2345h for each example
OR A[3]
; A[3]= 0F0Fh → Acc = 2F4Fh
OR #1133h ; MOVE PFX[0], #11h (smart-prefixing)
; OR #33h → Acc = 3377h
Special Notes:
The active accumulator (Acc) is not allowed as the src for this operation.
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