Maxim-integrated MAXQ622 Manual do Utilizador descarregar pdf (Página 39)

MAXQ612/MAXQ622 User’s Guide

Maxim Integrated 3-3

SECTION 3: PROGRAMMING

This section provides a programming overview of the MAXQ612/MAXQ622. For full details on the instruction set as

well as the system register and peripheral register detailed bit descriptions, see the appropriate sections later in this

document.

3.1 Addressing Modes

The instruction set for the MAXQ612/MAXQ622 provides three different addressing modes: direct, indirect, and immediate.

System and peripheral registers are referenced by direct addressing only. This addressing mode is used to specify

both source and destination registers, such as:

move A[0], A[1] ; copy accumulator 1 to accumulator 0

push A[0] ; push accumulator 0 on the stack

add A[1] ; add accumulator 1 to the active accumulator

Direct addressing is also used to specify addressable bits within registers.

move C, Acc.0 ; copy bit zero of the active accumulator

; to the carry flag

move PO0.3, #1 ; set bit three of port 0 Output register

Indirect addressing, in which a register contains a source or destination address, is used only in a few cases.

move @DP[0], A[0] ; copy accumulator 0 to the data memory

; location pointed to by data pointer 0

move A[0], @SP-- ; where @SP-- is used to pop the data pointed to

; by the stack pointer register

Immediate addressing is used to provide values to be directly loaded into registers or used as operands.

move A[0], #10h ; set accumulator 1 to 10h/16d

3.2 Prefix Operations

All instructions on the MAXQ612/MAXQ622 are 16 bits long and execute in a single cycle. However, some operations

require more data than can be specified in a single cycle or require that high-order register index bits be set to achieve

the desired transfer. In these cases, the prefix register module, PFX[n], is loaded with temporary data and/or required

before it clears to zero.

Instruction prefixing is required for the following operations, which effectively makes them two-cycle operations.

• When providing a 16-bit immediate value for an operation (e.g., loading a 16-bit register, ALU operation, supplying

an absolute program branch destination), the PFX[n] module must be loaded in the previous cycle with the high byte

of the 16-bit immediate value unless that high byte is zero. One exception to this rule is when supplying an absolute

branch destination to 00xxh. In this case, PFX[n] still must be written with 00h. Otherwise, the branch instruction

would be considered a relative one instead of the desired absolute branch.

• When selecting registers with indexes greater than 07h within a module as destinations for a transfer or registers

with indexes greater than 0Fh within a module as sources, the PFX[n] register must be loaded in the previous cycle.

This can be combined with the previous item.

Generally, prefixing operations are inserted automatically by the assembler as needed, so that (for example):

move DP[0], #1234h

actually assembles as:

move PFX[0], #12h

move DP[0], #34h

1 2 ... 34 35 36 37 38 39 40 41 42 43 44 ... 254 255

Comentários a estes Manuais

Sem comentários

Maxim-integrated MAXQ622 Manual do Utilizador Página 39

Comentários a estes Manuais

Manuais e produtos relacionados com Hardware Maxim-integrated MAXQ622