Maxim-integrated MAXQ622 Manual do Utilizador Página 117

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MAXQ612/MAXQ622 Users Guide
Maxim Integrated 7-3
7.1.2 Timer B Mode: Capture Mode
The 16-bit capture mode is invoked by setting the CP/RLB (TBCN.0) bit to 1. Timer B, when initially enabled, begins
counting from the TBV value and upon overflow, subsequently continues counting from 0000h to the 0FFFFh overflow,
i.e., rolls over from 0FFFFh to 0000h if left enabled and running. When an overflow occurs, it sets the TFB Flag. This
flag can generate an interrupt if enabled. The optional capture function is enabled by setting the EXENB (TBCN.3) bit
to 1. Once this has been done, a 1-to-0-transition on the TBB pin causes the value in Timer B (TBV) to be transferred
into the capture register (TBR) and the EXFB (TBCN.6) flag to be set. Note that the EXFB flag can be set independent
of the state of the TRB bit (e.g., EXFB can still be set on detection of a negative edge when TRB = 0). Setting of the
EXFB flag can generate an interrupt if enabled. If the EXENB bit is set to 0, then 1-to-0-transitions on the TBB pin do
not automatically trigger a capture event.
Figure 7-1. Timer B Autoreload Mode
Figure 7-2. Timer B Capture Mode
EXFB
TFB
TIMER B
INTERRUPT
150
150
FALLING
EDGE
TBB PIN
EXENB
TBR
0000h
TBV
=
1
TBA PIN
TRB
0
SYSTEM
CLOCK
CLOCK
PRESCALER
TBPS[2:0]
C/TB
EXFB
TFB
TIMER B
INTERRUPT
FALLING
EDGE
TBB PIN
EXENB
1
TBA PIN
TRB
CAPTURE
0
SYSTEM
CLOCK
CLOCK
PRESCALER
TBPS[2:0]
C/TB
150
TBV
TBR
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