
MAXQ612/MAXQ622 User’s Guide
Maxim Integrated 16-23
SR
SRA/SRA2/SRA4
Shift Accumulator Right
Shift Accumulator Right Arithmetically One, Two, or Four Times
Description:
Shifts the active accumulator right once for the SR, SRA instructions and 2 or 4 times respectively
for the SRA2, SRA4 instructions. The SR instruction shifts a 0 into the accumulator msbit while the
SRA, SRA2, and SRA4 instructions effectively shift a copy of the current msbit into the accumulator,
thereby preserving any sign orientation. For each shift iteration, the accumulator lsbit is shifted into
the Carry (C) flag.
Status Flags:
C, S (changes for SR only), Z
SR Operation:
15 Active Accumulator (Acc) 0 Carry Flag
0
→ → →
Acc.15 ← 0; Acc.[14:0] ← Acc.[15:1]; C ← Acc.0
Encoding:
15
0
1000 1010 1010 1010
Example(s):
; Acc = A345h, C=1, S=1, Z=0
SR ; Acc = 51A2h, C=1, S=0, Z=0
SR ; Acc = 28D1h, C=0, S=0, Z=0
SRA Operation:
15 Active Accumulator (Acc) 0 Carry Flag
→ → →
Acc.[14:0] ← Acc.[15:1]
Acc.15 ← Acc.15
C ← Acc.0
Encoding:
15
0
1000 1010 1111 1010
Example(s):
; Acc = 0003h, C=0, Z=0
SRA ; Acc = 0001h, C=1, Z=0
SRA ; Acc = 0000h, C=1, Z=1
SRA2 Operation:
15 Active Accumulator (Acc) 0 Carry Flag
→ → →
Acc.[13:0] ← Acc.[15:2]
Acc.[15:14] ← Acc.15
C ← Acc.1
Encoding:
15
0
1000 1010 1110 1010
Example(s):
; Acc = 0003h, C=0, Z=0
SRA2 ; Acc = 0000h, C=1, Z=1
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