
MAXQ612/MAXQ622 User’s Guide
Maxim Integrated 4-3
Table 4-2. System Register Bit Map
REG
BIT
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
AP — — — — AP (4 bits)
APC CLR IDS — — — MOD2 MOD1 MOD0
PRIV — — — — PSYW PSYR PULW PULR
PRIVT0 — — — — PRIVT0 (4 bits)
PSF Z S — GPF1 GPF0 OV C E
IC — — — — IPS1 IPS0 — IGE
PRIVT1 — — — — PRIVT1 (4 bits)
SC — — — — — MPE PWLL PWLS TAP — CDA1 CDA0 UPA ROD PWL —
IPR0 IVP7[1:0] IVP6[1:0] IVP5[1:0] IVP4[1:0] IVP3[1:0] IVP2[1:0] IVP1[1:0] IVP0[1:0]
IPR1 IVP15[1:0] IVP14[1:0] IVP13[1:0] IVP12[1:0] IVP11[1:0] IVP10[1:0] IVP9[1:0] IVP8[1:0]
PRIVF PSYWF PSYRF PULWF PULRF — — — —
ULDR — — — — — — — ULDR (9 bits)
UAPP — — — — — — — UAPP (9 bits)
CKCN — — — STOP SWB PMME CD1 CD0
WDCN POR EWDI WD1 WD0 WDIF WTRF EWT RWT
A[0:15] A[0:15] (16 bits)
PFX[0:7] PFX[0:7] (16 bits)
IP IP (16 bits)
SP — — — — — — SP (10 bits)
IV IV (16 bits)
LC[0] LC[0] (16 bits)
LC[1] LC[1] (16 bits)
OFFS OFFS (8 bits)
DPC — — — — — — — — — CWBS — WBS2 WBS1 WBS0 SDPS1 SDPS0
GR GR (16 bits)
GRL GRL (8 bits)
BP BP (16 bits)
GRS GRS (16 bits) = (GRL, GRH)
GRH GRH (8 bits)
GRXL GRXL (16 bits) = (GRL.7, 8 bits):(GRL, 8 bits)
FP FP = BP[OFFS] (16 bits)
DP[0] DP[0] (16 bits)
DP[1] DP[1] (16 bits)
CP CP (16 bits)
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