10-9 __________________________________________________________________________________________________________
MAXQ7667 User’s Guide
10.8 Accessing the Multiplier
T
here are no restrictions on how quickly data is entered into the operand registers or on the order of data entry. The only requirement
to do a calculation is to perform the loading of MA and/or MB registers having specified data type and operation in the MCNT regis-
t
er. The multiplier keeps track of the writes to the MA and MB registers, and starts calculation immediately after the prescribed num-
ber of operands is loaded. If two operands are specified for the operation, the multiplier waits for the second operand to be loaded
into the other operand register before starting the actual calculation. If for any reason software needs to reload the first operand, it
should either reload that same operand register or use the CLD bit in the MCNT register to reinitialize the multiplier; otherwise, loading
data to another operand register triggers the calculation. The CLD bit is a self-clearing bit that can be used for multiplier initialization.
When it is set, it clears all data registers and the OF bit to zero and resets the multiplier operand write counter.
The specified hardware multiplier operation begins when the final operand(s) is loaded and will complete in a single cycle. The read-
only MC1R, MC0R result registers can be accessed in the very next cycle unless accumulation/subtraction with MC[2:0] is requested
(MCW = 0 and MMAC = 1), in which case, one cycle is required so that stable data can be read. When MCW = 0, the MC[2:0] regis-
ters always require one wait cycle before the operation result is accessible. The single wait cycle needed for updating the MC[2:0] reg-
isters with a calculated result does not prevent initiating another calculation. Back-to-back operations can be triggered (independent
of data type and operand count) without the need of wait state between loading of operands.
Table 10-1. MAXQ7667 Hardware Multiplier Operations
MCW:MSUB:
MMAC
OPERATION MC2 MC1 MC0 MC1R:MC0R OF STATUS
000 Multiply MA x MB MA x MB No
001 Multiply-Accumulate MC + (MA x MB)
32 LSb of
Yes
010
Multiply-Negate
(SUS = 0 Only)
-(MA x MB) -(MA x MB) No
011 Multiply-Subtract MC - (MA x MB)
32 LSb of
[MC - 2 x (MA x MB)]
Yes
100 Multiply MC2 MC1 MC0 MA x MB No
101 Multiply-Accumulate MC2 MC1 MC0
32 LSb of
[MC + (MA x MB)]
No
110
Multiply-Negate
(SUS = 0 Only)
MC2 MC1 MC0 -(MA x MB) No
111 Multiply-Subtract MC2 MC1 MC0
32 LSb of
[MC - (MA x MB)]
No
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