Maxim-integrated MAXQ7667 Manual do Utilizador descarregar pdf (Página 236)

__________________________________________________________________________________________________________ 14-4

MAXQ7667 User’s Guide

Table 14-1. SAR ADC Module Pins

The ADC gets the reference from three sources: external source REF, internal buffered-bandgap reference that provides 2.5V, and

AVDD. The internal bandgap and reference buffer can be individually disabled, allowing external reference(s) to drive any of these

nodes. All are disabled at power-on to avoid contention if external reference(s) are used. The reference sources are designed to quick-

ly power on and off to minimize power consumption in applications that duty-cycle between run and sleep modes.

14.2 SAR ADC Pins

Table 14-1 shows all the pins in the SAR ADC module.

N A ME PIN FU N C TION

AIN0 36

Analog Input 0. This ADC input pin can be used for s ingle-ended measurements relative to AGND or for d ifferential

measurement relative to analog input AIN1 (negative side). The active ADC input s ignal is selectable v ia the analog

multi p lexer.

AIN1 37

Analog Input 1. This ADC input pin can be used for s ingle-ended measurements relative to AGND or for d ifferential

measurement relative to analog input AIN0 ( positive s ide). The active ADC input signal is selectable via the analog

multi p lexer.

AIN2 38

Analog Input 2. This ADC input pin can be used for s ingle-ended measurements relative to AGND or for d ifferential

measurement relative to analog input AIN3 (negative side). The active ADC input s ignal is selectable v ia the analog

multi p lexer.

AIN3 39

Analog Input 3. This ADC input pin can be used for s ingle-ended measurements relative to AGND or for d ifferential

measurement relative to analog input AIN2 ( positive s ide). The active ADC input signal is selectable via the analog

multi p lexer.

AIN4 40 Analog Input 4. This ADC input pin can be used for single-ended measurements only relative to AGND.

REFBG 35 Internal 2.5V Reference Output. Connect a m inimum v alue of 0.47µF bypass capacitor to AGN D.

REF 34

ADC Reference Input and Reference Buffer Output. This pin is for the ADC reference input. The buffer connected to the

REFBG p in must be disabled to allow the pin to accept an external reference input. Prov ide a bypass to AGND with a 0.47µF

capacitor. This pin requi res a low ESR, which can be done by using two capacitors in paral lel instead of one, e.g., a 1µF

capacitor in paral lel w ith a 10nF capacitor instead of just a 1µF capacitor.

AGND 28, 31, 33 Analog Ground. This pin provides the ground reference for all internal analog circuitry.

AVDD 27, 32

Analog Supp ly Voltage (+3.3V). This pin prov ides power to all the analog b locks. Connect all AVD D p ins to the same point.

Connect to REG3P3 and bypass with a 0.47µF capacitor to ground for self- powered operation.

ADC CTL 12

ADC Control Input. Dig ital GPIO, Ti mer 0 I/O, and Port 0.3. As ADCCTL this pin is user p rog ram mab le; r ising or falling

edge controls the SAR ADC sampl ing instant and start of conversion. Optionally, the other edge can be used to enable the

ADC and begin acqui r ing p r ior to sampl ing. This p in can also be configured as a dig ital I/O or as a pr i mary ti mer/ PWM I/O.

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