Maxim-integrated MAXQ7667 Manual do Utilizador descarregar pdf (Página 48)

___________________________________________________________________________________________________________ 4-4

MAXQ7667 User’s Guide

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

— — — — AP3 AP2 AP1 AP0

08h[00h]

0 0 0 0 0 0 0 0

CLR IDS — — — MO D2 MOD1 MO D0

APC

08h[01h]

0 0 0 0 0 0 0 0

Z S — GPF1 GPF0 OV C E

PSF

08h[04h]

1 0 0 0 0 0 0 0

— — CG D S — — — INS IGE

08h[05h]

0 0 0 0 0 0 0 0

IMS — IM5 IM4 IM3 IM2 IM1 IM0

IMR

08h[06h]

0 0 0 0 0 0 0 0

TAP — C DA1 C DA0 UPA ROD PWL —

08h[08h]

1 0 0 0 0 0 s 0

IIS — II5 II4 II3 II2 II1 II0

IIR

08h[0Bh]

0 0 0 0 0 0 0 0

XTRC — RC M D STOP SWB PMM E CD1 C D0

CKC N

08h[0Eh]

s 0 0 0 0 0 0 0

POR EWDI WD1 WD0 WDIF WTRF EWT RWT

WDC N

08h[0Fh]

s s 0 0 0 s s 0

A[n]15 A[n]14 A[n]13 A[n]12 A[n]11 A[n]10 A[n]9 A[n]8 A[n]7 A[n]6 A[n]5 A[n]4 A[n]3 A[n]2 A[n]1 A[n]0

A[n]

(0…15)

09h[0nh]

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

PFX[n]15 PFX[n]14 PFX[n]13 PFX [n]12 PFX[n]11 PFX[n]10 PFX[n]9 PFX[n]8 PFX [n]7 PFX[n]6 PFX[n]5 PFX[n]4 PFX[n]3 PFX[n]2 PFX[n]1 PFX[n]0

PFX[n]

(0…7)

0Bh[0nh]

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IP15 IP14 IP13 IP12 IP11 IP10 IP9 IP8 IP7 IP6 IP5 IP4 IP3 IP2 IP1 IP0

0Ch[00h]

1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

— — — — — — — — — — — — SP3 SP2 SP1 S P0

0Dh[01h]

0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1

IV15 IV14 IV13 IV12 IV11 IV10 IV9 IV8 IV7 IV6 IV5 IV4 IV3 IV2 IV1 IV0

0Dh[02h]

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

LC[0]15 LC[0]14 LC[0]13 LC[0]12 LC[0]11 LC[0]10 LC[0]9 LC[0]8 LC[0]7 LC[0]6 LC[0]5 LC[0]4 LC[0]3 LC[0]2 LC[0]1 LC[0]0

LC[0]

0Dh[06h]

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

LC[1]15 LC[1]14 LC[1]13 LC[1]12 LC[1]11 LC[1]10 LC[1]9 LC[1]8 LC[1]7 LC[1]6 LC[1]5 LC[1]4 LC[1]3 LC[1]2 LC[1]1 LC[1]0

LC[1]

0Dh[07h]

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

OFFS7 OFFS6 OFFS5 OFFS4 OFFS3 OFFS2 OFFS1 OFFS0

OFFS

0Eh[03h]

0 0 0 0 0 0 0 0

— — — — — — — — — — — WBS2 WBS1 WBS0 S D PS1 S D PS0

DP C

0Eh[04h]

0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0

Table 4-2. MAXQ7667 System Register Bit Functions and Reset Value

s = Bit affected only by power-on reset and not by other forms of reset. See the register description for more information.

1 2 ... 43 44 45 46 47 48 49 50 51 52 53 ... 346 347

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Maxim-integrated MAXQ7667 Manual do Utilizador Página 48

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