Maxim-integrated MAXQ7667 Manual do Utilizador descarregar pdf (Página 99)

100

101

6-5 ___________________________________________________________________________________________________________

MAXQ7667 User’s Guide

2CLx REGISTER

(

LOWER BYTE OF T2Cx)

8-BIT CAPTURE/COMPARE LOW

2Lx REGISTER

(LOWER BYTE OF T2Vx)

8-BIT UP COUNTER LOW

2RLx REGISTER

(

LOWER BYTE OF T2Rx)

-BIT RELOAD LOW

T2CHx REGISTER

8-BIT CAPTURE/COMPARE HIGH

T2Hx REGISTER

8-BIT UP COUNTER HIGH

T2RHx REGISTER

8-BIT RELOAD HIGH

OUTPUT CONDITIONING

POLARITY SELECTION

OUTPUT CONDITIONING

POLARITY SELECTION

INPUT CONDITIONING

SCALING

GATING

APTURE

CAPTURE

CLOCK

QUAL

EQUAL

OVERFLOW

ELOAD

RELOAD

VERFLOW

Figur

e 6-2. T

ype 2 T

imer/Counter in 8-Bit Mode

In Figure 6-2, the input and output conditioning is determined by the status/control registers T2CNAx (Type 2 timer/counter control reg-

ister A), T2CNBx (T

ype 2 timer/counter contr

ol register B), and T2CFGx (Type 2 timer configuration register). See

Section 6.2: T

ype 2

imer/Counter Peripheral Registers

for a detailed discussion of these r

egisters.

1 2 ... 94 95 96 97 98 99 100 101 102 103 104 ... 346 347

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